2022, issue 2, p. 58-66

Received 14.09.2022; Revised 22.09.2022; Accepted 29.09.2022

Published 30.09.2022; First Online 05.10.2022


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UDC 519.6:004.8

Parallel Implementation of Sparse Distributed Memory for Semantic Storage

Ruslan Vdovychenko * ORCID ID favicon Big,   Vadim Tulchinsky ORCID ID favicon Big

V.M. Glushkov Institute of Cybernetics of the NAS of Ukraine, Kyiv

* Correspondence: This email address is being protected from spambots. You need JavaScript enabled to view it.


Introduction. Sparse Distributed Memory (SDM) and Binary Sparse Distributed Representations (Binary Sparse Distributed Representations, BSDR), as two phenomenological approaches to biological memory modelling, have many similarities. The idea of ​​their integration into a hybrid semantic storage model with SDM as a low-level cleaning memory (brain cells) for BSDR, which is used as an encoder of high-level symbolic information, is natural. A hybrid semantic store should be able to store holistic data (for example, structures of interconnected and sequential key-value pairs) in a neural network. A similar design has been proposed several times since the 1990s. However, the previously proposed models are impractical due to insufficient scalability and/or low storage density. The gap between SDM and BSDR can be bridged by the results of a third theory related to sparse signals: Compressive Sensing or Sampling (CS). In this article, we focus on the highly efficient parallel implementation of the CS-SDM hybrid memory model for graphics processing units on the NVIDIA CUDA platform, analyze the computational complexity of CS-SDM operations for the case of parallel implementation, and offer optimization techniques for conducting experiments with big sequential batches of vectors.

The purpose of the paper is to propose an efficient software implementation of sparse-distributed memory for preserving semantics on modern graphics processing units.

Results. Parallel algorithms for CS-SDM operations are proposed, their computational complexity is estimated, and a parallel implementation of the CS-SDM hybrid semantic store is given. Optimization of vector reconstruction for experiments with sequential data batches is proposed.

Conclusions. The obtained results show that the design of CS-SDM is naturally parallel and that its algorithms are by design compatible with the architecture of systems with massive parallelism. The conducted experiments showed high performance of the developed implementation of the SDM memory block.


Keywords: GPU, CUDA, neural network, Sparse Distributed Memory, associative memory, Compressive Sensing.


Cite as: Vdovychenko R., Tulchinsky V. Parallel Implementation of Sparse Distributed Memory for Semantic Storage. Cybernetics and Computer Technologies. 2022. 2. P. 58–66. (in Ukrainian) https://doi.org/10.34229/2707-451X.22.2.6



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